Low-Complexity Soft-Aided Error-and-Erasure Decoding for Generalized Product Codes


Abstract

Generalized product codes (GPCs) combine excellent high-rate performance with low-complexity hardware implementations. We propose the refined dynamic reliability score decoder (RDRSD), a hard-message-passing iterative error-and-erasure decoder that uses dynamic reliability scores. Its syndrome-domain implementation has complexity comparable to hard-decision iBDD. Across various GPCs and decoding configurations, RDRSD provides different complexity–performance trade-offs and achieves approximately 1 dB coding gain over iBDD. For GPCs with component codes of small error-correcting capability, we also analyze the error floor and propose a soft-aided post-processing step that significantly lowers it.

Generalized product codes, soft-aided decoding, error floors, forward error correction, optical communication

1 Introduction↩︎

GPCs, or product-like codes, are widely used in high-throughput systems, particularly OTNs [@ITU_G9751_2018; @OIF_400ZR_2020], due to their excellent high-rate performance and efficient hardware implementation. Their regular structure enables massive parallelization, and their algebraic component codes support syndrome-domain iBDD with up to two orders of magnitude less internal data flow than LDPC codes [@staircaseCode].

To improve GPC decoding and meet stringent optical-communication FEC requirements [@graell20forward], SDD algorithms have been introduced. A well-known example is Chase–Pyndiah decoding [@pyndiahNearoptimumDecodingProduct1998] and its low-complexity and soft-output variants [@AlDweik2009hybrid; @StraßhoferGMI; @miao2026improved]. Other approaches, such as iterative OSD [@SheniOSD] and BP decoding [@SheniBP], achieve gains of up to 0.2 dB over conventional Chase–Pyndiah decoding at moderately higher complexity. However, SDD is challenging to implement beyond 1 Tb/s, since soft-message passing typically requires internal data flow several times the net data rate. The demand for higher rates and lower energy consumption has therefore motivated soft-aided hard-decision decoding. These algorithms approach iBDD complexity by incorporating limited soft information [@sheikh2018iterative; @liga2019novel; @SheniOSD; @ZhaoThreshold; @ZhuStaircase; @sheikh2021novel; @11313545]. Although they provide significant waterfall gains, their implementation complexity and error-floor behavior are often not fully characterized.

In previous work [@miao2022JLT; @Miao22ECOC; @Rapp24ECOC], we proposed the DRSD, a low-complexity, high-performance soft-aided decoder for GPCs. Here, we introduce the refined DRSD (RDRSD), which reduces complexity and memory while preserving or improving performance. It avoids the sorting required by DRSD and reduces message passing for soft-information updates. The RDRSD uses an iBDD-like syndrome-domain architecture and gains about 1 dB over iBDD across the considered GPCs. We also analyze its PC error floor, derive a union bound for miscorrection-free EaE decoding, and propose soft-aided post-processing to lower the floor. Secs. 25 introduce the preliminaries and decoders; Secs. 68 present waterfall results, error-floor analysis, and post-processing, followed by the conclusion.

Notation: We use boldface letters to denote vectors, e.g., \(\boldsymbol{y}\), and \(y_i\) denotes the \(i\)th component of \(\boldsymbol{y}\). With \({\mathbb{F}_2=\{0,1\}}\), we introduce the Hamming weight \({\text{wt}\left(\boldsymbol{y}\right)=|\{i:y_i\neq 0\}|}\) for \({\boldsymbol{y}\in\mathbb{F}_2^n}\), the Hamming distance \(\mathrm{d}({\boldsymbol{y}_1},{\boldsymbol{y}_2})=\text{wt}\left(\boldsymbol{y}_1-\boldsymbol{y}_2\right)\), and the notation \({d_{\sim{\text{E}(\boldsymbol{y}')}}(\boldsymbol{y}',\boldsymbol{c}):=|\{i\in \{1,2,\ldots,n\}:c_i\neq y'_i,y'_i\neq \mathord{?}\}|}\) for \({\boldsymbol{c}\in \mathbb{F}_2^n}\) and \({\boldsymbol{y}'\in\{0,1,\mathord{?}\}}\) where “\(\mathord{?}\)” is an erasure. The operator \(\text{E}(\boldsymbol{y}')\) gives the number of erasures in \(\boldsymbol{y}'\). We define a function \(\mu(x) = 1-2x\) and \(\psi(x) = (1-\text{sign}(x))/2\). Both \(\mu(x)\) and \(\psi(x)\) apply to matrices element-wise. Finally, \(Q(x)\!=\!\tfrac{1}{\sqrt{2\pi}}\int_x^{\infty}\text{e}^{-\frac{u^2}{2}}\mathrm{d}u\) is the Gaussian tail distribution function.

2 Preliminaries↩︎

2.1 Channel Models↩︎

We consider three communication channels: the BSC, the EaE channel, and the BI-AWGN channel.

A BSC is defined by the crossover probability \({\delta\!=\!P(Y\!\neq \!X)}\).

For the EaE channel, \({X\in\{0,1\}}\) and \({Y\in\{0,1,\mathord{?}\}}\), where “\(\mathord{?}\)” is an erasure. The transition probabilities are \({P(Y=1-x|X=x)=\delta_{\text{c}}}\), \({P(Y=\mathord{?}|X=x)=\epsilon_{\text{c}}}\), and \({P(Y=x|X=x)=1-\delta_{\text{c}}-\epsilon_{\text{c}}}.\)

For the BI-AWGN channel with BPSK, we map bit \({x\mapsto \mu(x)=:\tilde{x}}\), and the received symbol is \({\tilde{y}_i = \tilde{x}_i + n_i\in \mathbb{R}}\), where \({n_i\sim\undefined{N}(0,\sigma^2)}\) with \({\sigma^2 = (2R\cdot E_{\text{b}}/N_{\text{0}})^{-1}}\) and \(R\) is the rate of the GPC.

Quantizing the BI-AWGN output yields the BSC and EaE channels. For an erasure threshold \({\mathsf{T}\geq0}\), declare \(y=\mathord{?}\) if \({\tilde{y}\in[-\mathsf{T},\mathsf{T}]}\), and otherwise set \(y=\psi(\tilde{y})\in\{0,1\}\). The resulting EaE parameters are \[\label{eq:EaEprob} \delta_{\text{c}}= Q\left(\tfrac{\mathsf{T}+1}{\sigma}\right), \quad \epsilon_{\text{c}}= 1 - Q\left(\tfrac{\mathsf{T}-1}{\sigma}\right) - \delta_{\text{c}}.\tag{1}\] For \(\mathsf{T}=0\), this reduces to a BSC with \(\delta = Q\left(\tfrac{1}{\sigma}\right)\).

2.2 BCH Codes↩︎

We use binary BCH component codes because of their cyclic structure, large minimum distances, and efficient algebraic BDD.

Let \(\undefined{C}_{\text{BCH}}[n, k, d_{\mathrm{min}}]\) denote a primitive, narrow-sense, binary BCH code with block length \(n\), dimension \(k\), and minimum Hamming distance \(d_{\mathrm{min}}\), yielding code rate \(R_{\text{c}} = k/n\). Let \(t\) denote the number of correctable errors and \(d_{\mathrm{des}}\) the designed distance, which is a lower bound on \(d_{\mathrm{min}}\).3 For primitive BCH codes, \(n = 2^b - 1\), \(k \geq n - bt\), and \(d_{\mathrm{des}}= 2t + 1\), where \(\mathbb{F}_{2^b}\) is the finite field over which the associated RS supercode is defined. For brevity, we sometimes describe the parameters of a BCH code with \([n,t]\).

High-rate GPCs typically use BCH component codes with small minimum distance. Adding a parity bit makes all codewords even-weight and gives an extended BCH (eBCH) code.4 Extending \([n,k,d_{\mathrm{min}}]\) yields \(\undefined{C}_{\text{eBCH}}[n+1,k,d_{\mathrm{min}}+1]\): the error-correcting capability \(t\) is unchanged, while the erasure-correcting capability increases by \(1\).

2.3 Bounded Distance Decoding (BDD) for BCH Codes↩︎

The BDD rule for a binary vector \(\boldsymbol{y}\in \{0, 1\}^n\) is \[\text{BDD}(\boldsymbol{y})=\begin{cases} \boldsymbol{c}& \exists \boldsymbol{c}\in \undefined{C}\text{ such that }\mathrm{d}(\boldsymbol{y},\boldsymbol{c}) \leq t\\ \boldsymbol{y}&\text{otherwise}. \end{cases}\] BDD corrects \(\boldsymbol{y}\) to \(\boldsymbol{c}\) if \(\mathrm{d}(\boldsymbol{y},\boldsymbol{c})\leq t\) and otherwise declares failure. A miscorrection occurs if it returns \(\boldsymbol{c}\neq\boldsymbol{x}\), where \(\boldsymbol{x}\) was transmitted, and can significantly degrade hard-decision GPC decoding (Sec. 4).

The BDD algorithm for BCH codes is typically implemented by syndrome-based algebraic decoding: after computing the syndrome, the decoder obtains the error-locator polynomial, e.g., using the BM algorithm, whose roots are then found by a Chien search to identify the error locations [@roth_introduction_2006].

For high-rate BCH codes, the realization of BDD can be significantly simplified, requiring only a small constant number of additions, multiplications, and lookup-table operations. This is achieved by parameterizing the solution of the error-locator polynomial in terms of the syndrome, allowing it to be directly obtained by substituting the syndrome values. Consequently, the Chien search can be replaced by a lookup-table operation, since the error-locator polynomial has low degree for small \(t\), as described in [@SukmadjiRSBCH]. For example, for a \(t=2\) code, a total of \(1\) addition, \(5\) multiplications, \(1\) inversion, \(1\) division, and \(1\) lookup-table operation are needed to execute a BDD step in the worst case. For a \(t=3\) code, \(8\) additions, \(10\) multiplications, \(2\) divisions, and \(2\) lookup-table operations are needed.

2.4 Generalized Product Codes↩︎

We introduce GPCs through generalized Tanner graphs [@Tanner81recursive], using product and staircase codes as block and SC examples.

For a block \([N,K,d_{\mathrm{GPC}}]\) GPC, its generalized Tanner graph is a bipartite graph consisting of a set \(\undefined{N}=\{\mathsf{v}_1,\mathsf{v}_2,\ldots,\mathsf{v}_N\}\) of VNs, with \(|\undefined{N}|=N\), and a set \({\undefined{M}=\{\mathsf{c}_1,\mathsf{c}_2,\ldots,\mathsf{c}_M\}}\) of CNs, with \(|\undefined{M}|=M\). Each VN represents a data bit, while each CN represents a component code, which in this work is a binary BCH code or its extended code. An edge connects a VN and a CN if the corresponding data bit participates in the associated BCH codeword. The resulting GPC block length \(N\), code dimension \(K\), and minimum distance \(d_{\mathrm{GPC}}\) are determined by the structure of the generalized Tanner graph and the parameters of the component codes.

SC GPCs append new component codewords continuously during transmission, yielding a generalized Tanner graph with infinitely many nodes. Since practical SC GPCs are often periodic, their structure can be specified by describing one period of the generalized Tanner graph.

In this work, we focus on GPCs in which all VNs have degree two and all CNs employ the same component code. These restrictions enable simple hardware implementation and include many practical GPC constructions such as PCs and staircase codes. During iterative decoding, the degree-two VNs simply exchange messages between their two incident CNs. At the CNs, BCH decoding algorithms are executed to update the data buffer and, when available, the associated soft information.

Before introducing the example codes, we define two mappings \(\phi_{\mathsf{c}\shortrightarrow\mathsf{v}}\) and \(\phi_{\mathsf{c}\shortrightarrow\mathsf{c}}\) to facilitate the description of the iterative decoding algorithms. The mapping \(\phi_{\mathsf{c}\shortrightarrow\mathsf{v}}:(j,\kappa)\mapsto i\) maps the \(\kappa\)-th incident VN of CN \(\mathsf{c}_j\) to the VN \(\mathsf{v}_i\). The mapping \(\phi_{\mathsf{c}\shortrightarrow\mathsf{c}}:(j,\kappa)\mapsto j'\) maps a CN \(\mathsf{c}_j\) to another CN \(\mathsf{c}_{j'}\) such that the two CNs are both incident to the same VN \(\mathsf{v}_i\) with \(i=\phi_{\mathsf{c}\shortrightarrow\mathsf{v}}(j,\kappa)\).

Figure 1: Representation of a PC from the data-buffer perspective in (a) and the generalized Tanner graph perspective in (b).
Figure 2: Representation of a staircase code from the data-buffer perspective in (a) and the generalized Tanner graph perspective in (b).

2.4.1 Product Codes (PCs)↩︎

A PC is a 2D array whose rows and columns are codewords of a component code. A PC with \([n,k,d_{\mathrm{min}}]\) component code has parameters \({N=n^2}, {K=k^2}, {d_{\mathrm{GPC}}=d_{\mathrm{min}}^2}\). Fig. 1 shows a PC with \({[n=4,k=3]}\) component codes and its Tanner graph. Each row CN connects to column CNs through \(n\) degree-two VNs and vice versa. We index the bit in row \(a\) and column \(b\) as \(\mathsf{v}_{(a-1)n+b}\), the row CNs from \(1\) to \(n\), and the column CNs from \(n+1\) to \(2n\). Thus,

\[\phi_{\mathsf{c}\shortrightarrow\mathsf{v}}(j,\kappa) = \begin{cases} (j-1)n+\kappa & \text{if } j\leq n\\ (\kappa-1) n + j-n& \text{if } j> n\\ \end{cases}\] and \[\phi_{\mathsf{c}\shortrightarrow\mathsf{c}}(j,\kappa)= \begin{cases} \kappa+n & \text{if } j\leq n\\ \kappa & \text{if } j> n.\\ \end{cases}\]

2.4.2 Staircase Codes (SCCs)↩︎

A prominent SC GPC is the staircase code [@staircaseCode], described here in the zipper-code framework [@sukmadji2022zipper]. Fig. 2-(a) shows its data-buffer representation for a \([4,3]\) component code. The buffer consists of a real buffer, shown on the right, whose bits are transmitted over the physical channel, and a virtual buffer, shown on the left, whose bits are not transmitted but are deterministically and causally mapped from the real buffer. This mapping ensures that each row of the combined buffer forms a valid component codeword. All-zero bits are inserted at the beginning of the virtual buffer to initialize the encoder. During transmission, new information bits, shown in dark green, are appended to the real buffer and encoded jointly with the mapped virtual bits, shown in light green, to generate the parity bits, shown in blue. This yields a streaming construction for arbitrarily long data sequences. The rate of the staircase code is therefore \(R=2\frac{k}{n}-1.\) Fig. 2-(b) depicts the corresponding generalized Tanner graph with an infinite and periodic structure.

In a staircase code, blocks of data bits in the real buffer are transposed and copied into the subsequent block of the virtual buffer. To be precise, let \(\omega=\frac{n}{2}\) be the width of both the real and virtual buffers. Let \(\mathsf{c}_j\), with \(j\in \mathbb{N}_{+}\), denote the CN corresponding to the \(j\)-th row of the data buffer. Then, the VNs in the \(j\)-th row and \(i\)-th column of the real buffer are indexed as \(\mathsf{v}_{(j-1)\omega+i}\). For the \(\kappa\)-th incident VN of the \(j\)-th CN, let \(x=\lfloor \frac{j-1}{\omega} \rfloor\) and \(y=(j-1)\mod \omega\). We have

\[\phi_{\mathsf{c}\shortrightarrow\mathsf{c}}(j,\kappa)= \begin{cases} (x-1)\omega+\kappa &\text{if } \kappa \leq \omega\\ (x+1)\omega + \kappa -\omega & \text{if } \kappa > \omega, \end{cases}\] and \[\phi_{\mathsf{c}\shortrightarrow\mathsf{v}}(j,\kappa) = \begin{cases} y-\omega + \omega \cdot \phi_{\mathsf{c}\shortrightarrow\mathsf{c}}(j,\kappa) +1 & \text{if } \kappa \leq \omega\\ \omega(j-1) + \kappa -\omega & \text{if } \kappa > \omega. \end{cases}\]

3 IBDD of GPCs↩︎

3.1 Algorithm Description↩︎

For a block GPC, one iBDD iteration consists of decoding each CN once using BDD. The iBDD algorithm stops when either all syndromes are zero, indicating that no correctable errors remain, or when a predefined maximum number of iterations \(L\) is reached.

To simplify the implementation, the syndrome of each CN word is typically stored, since BDD requires only the syndrome to estimate the error locations. At each CN decoding step, up to \(t\) data bits are flipped, and the affected syndromes are updated accordingly.

For SC GPCs, a windowed decoding schedule is employed to accommodate their streaming nature. Specifically, \(W\) CNs are grouped to form a decoding window. Similar to the block GPC case, the CNs within this window are decoded over \(L\) iterations. Then, the window is shifted forward by an integer multiple of \(\omega\). For staircase codes, we consider a shift of \(\omega\) CNs (one block). The data bits associated with the first \(\omega\) CNs in the window are output and the iterative decoding process continues.

The iBDD algorithms for block and SC GPCs are described in Algorithm 3 and Algorithm 4, respectively.

Figure 3: IBDD of GPCs
Figure 4: Windowed iBDD of SC GPCs

3.2 Complexity Analysis↩︎

Based on Algorithm 3, we discuss the low complexity of iBDD from three perspectives.

3.2.1 Computational Complexity↩︎

Upon initialization, the syndromes of all CNs are computed with complexity \(\undefined{O}(N)\). Each subsequent iteration has complexity \(\undefined{O}(M)\), since each CN performs only a small, constant number of operations to decode its syndrome, as described in Sec. 2.3. Note that the BDD step for CNs with a zero syndrome is skipped, and the actual number of BDD executions should be evaluated by simulation.

3.2.2 Memory↩︎

A data buffer (\(N\) bits) and, typically, a syndrome buffer (\(btM\) bits) are required, e.g., as in [@FougstedtVLSI]. In total, the required memory is \(M_{\text{iBDD}}= N + btM\) bits. Since iBDD is an intrinsic message-passing decoder, no additional memory is needed to store the channel output for later use.

3.2.3 Internal Decoder Data Flow↩︎

Upon initialization, all bits are read once to compute the syndromes. During iterative decoding, most of the data buffer remains unchanged and is updated only when a BDD correction occurs, which affects at most \(t\) bits per component codeword in each iteration. In contrast, the syndrome buffer is accessed frequently for both read and write operations. However, the syndrome buffer is significantly smaller than the data buffer.

4 Error-and-Erasure Decoding (EaED)↩︎

This section describes the EaED algorithm with miscorrection detection, which is a key component of the RDRSD. Since EaED serves as a component-code decoder, we consider only a component (e)BCH code when referring to (code)words in this section.

4.1 EaED with Miscorrection Detection↩︎

This algorithm improves upon the versions in [@rapp2021error; @miao2022JLT] by enabling a list-based decoding option, which allows a larger number of errors and erasures to be corrected.

Let \(\boldsymbol{x}\in\undefined{C}\) be the transmitted codeword and \(\boldsymbol{y}\in\{0, \mathord{?}, 1\}^n\) its noisy received version. The number of erasures in \(\boldsymbol{y}\) is denoted by \(E\) and the decoder output is denoted by \({\boldsymbol{w}\mathrel{\vcenter{:}}=\text{EaED}(\boldsymbol{y})}\). We further introduce a design parameter \({\undefined{J}\in \mathbb{N}_{+}}\) that controls the performance–complexity trade-off.

First, initialize an empty candidate list \(\undefined{W}=\emptyset\). If \(E=0\), set \(J=1\). If \(E>0\), set \[J\mathrel{\vcenter{:}}= \min\{2^{E-1},\undefined{J}\}.\] Then, \(J\) independent pairs of complementary random vectors \(\boldsymbol{p}^{(\text{1})},\boldsymbol{p}^{(\text{2})}\in\{0, 1\}^{E}\) satisfying \(\boldsymbol{p}^{(\text{1})}+\boldsymbol{p}^{(\text{2})}=(1,1,\ldots,1)\) are generated. Each pair \((\boldsymbol{p}^{(\text{1})},\boldsymbol{p}^{(\text{2})})\) defines a filling pattern for the erasures.

We then apply the following procedure to each test pattern. By replacing the erasures in \(\boldsymbol{y}\) using \(\boldsymbol{p}^{(\text{1})}\) and \(\boldsymbol{p}^{(\text{2})}\), we obtain two test patterns \(\boldsymbol{y}^{(\text{1})},\boldsymbol{y}^{(\text{2})}\in\{0, 1\}^n\) for each pair. Note that \(\boldsymbol{y} = \boldsymbol{y}^{(\text{1})}= \boldsymbol{y}^{(\text{2})}\) for \(E=0\). Next, we perform a BDD step for each test pattern. Specifically, for each generated test pattern indexed by \(i\), we compute \(\boldsymbol{w}^{(i)}\mathrel{\vcenter{:}}=\text{BDD}(\boldsymbol{y}^{(i)})\). If \(\boldsymbol{w}^{(i)}\in\undefined{C}\), we perform miscorrection detection using 2 , as described later in Sec. 5.1.2. If \(\boldsymbol{w}^{(i)}\) is classified as a miscorrection, it is discarded. Otherwise, we compute its distance to \(\boldsymbol{y}\) over the non-erased positions of \(\boldsymbol{y}\), i.e., \(d=d_{\sim{\text{E}(\boldsymbol{y})}} \left(\boldsymbol{y}, \boldsymbol{w}^{(i)}\right),\) and add the tuple \((\boldsymbol{w}^{(i)},d)\) to the candidate list \(\undefined{W}\). This procedure is repeated for all \(J\) filling-pattern pairs.

Finally, if \(\undefined{W}=\emptyset\), the decoder declares a failure and outputs \(\boldsymbol{w}=\boldsymbol{y}\). Otherwise, the decoder outputs the decision codeword \({\text{argmin}}_{\boldsymbol{w}\in \undefined{W}} \, d_{\sim{\text{E}(\boldsymbol{y})}} \left(\boldsymbol{y}, \boldsymbol{w}\right)\). Ties are broken at random.

The complete EaED procedure is summarized in Algorithm 5. Note that when \(E=0\) and no miscorrection detection is performed, the EaED reduces to conventional BDD.

Figure 5: EaE decoder (EaED)

Another commonly used EaE decoder is the one-step algebraic EaE decoding algorithm proposed by Forney [@forney1965decoding]. It extends the Gorenstein–Zierler algorithm [@roth_introduction_2006] and corrects errors and erasures jointly by solving the key equation. Forney’s EaE decoder follows the decoding rule \[\boldsymbol{w}= \begin{cases} \boldsymbol{c}, & \exists\, \boldsymbol{c}\in \undefined{C}\text{ such that } \text{E}(\boldsymbol{y}) + 2d_{\sim{\text{E}(\boldsymbol{y})}}(\boldsymbol{y},\boldsymbol{c}) < d_{\mathrm{min}},\\ \boldsymbol{y}, & \text{otherwise}. \end{cases}\] We do not use Forney’s algebraic EaE decoder as the component-code decoder, since it is limited by the minimum-distance decoding radius and, based on our observations, performs worse than the proposed EaED in iterative decoding when soft information is available [@rapp2021error].

For reference, we also define an ideal EaED decoder that achieves miscorrection-free decoding by appending genie-aided miscorrection detection to EaED, i.e., \[\text{idealEaED}(\boldsymbol{y}) = \begin{cases} \text{EaED}(\boldsymbol{y}) & \text{if } \text{EaED}(\boldsymbol{y}) = \boldsymbol{x},\\ \mathsf{fail} & \text{if } \text{EaED}(\boldsymbol{y}) \neq \boldsymbol{x}, \end{cases}\] where \(\boldsymbol{x}\) denotes the transmitted component-code codeword.

For clarity, we define several iterative decoding algorithms for GPCs. A decoder that uses an EaED without miscorrection detection as its component decoder is referred to as iEaED. Replacing this component decoder with an ideal EaED yields the ideal iEaED. When \(\mathsf{T}=0\), the ideal iEaED reduces to the ideal iBDD.

4.2 Miscorrection Analysis↩︎

A miscorrection occurs when the BDD outputs an incorrect codeword that is closer to the received word than to the transmitted codeword. This is more likely for component codes with small minimum distance, where codewords are relatively close to each other. Miscorrections are therefore particularly detrimental to iterative hard-decision decoding of high-rate GPCs. Typically, when BDD is applied to a word with more than \(t\) errors, a miscorrection increases the number of erroneous bits by \(t\). Moreover, the miscorrected word is declared as a valid codeword with zero syndrome and can no longer be detected by the associated CN. This may eventually lead to a stall pattern and cause an iterative decoding failure.

The miscorrection probability for BDD was derived in [@mceliece1986decoder] and extended to EaED in [@Miao26IZS]. We give an overview of the results here. We use \(U\) and \(E\) to denote the number of errors and erasures in a word, respectively.

Table 1: Decoding success probability for different numbers of errors \(U\) and erasures \(E\) for the \([256,239,6]\) eBCH code.
0 1 2 3 4 5 6 7 8 9 10
0 1 1 1 1 1 1 0.69 0.45 0.29 0.18 0.11
1 1 1 1 1 0.62 0.37 0.22 0.12 0.069 0.039 0.021
2 1 1 0.38 0.25 0.093 0.062 0.023 0.016 0.0057 0.0039 0.0014
3 0 0 0 0 0 0 0 0 0 0 0
Table 2: Miscorrection probability for different numbers of errors \(U\) and erasures \(E\) for the \([256,239,6]\) eBCH code.
0 1 2 3 4 5 6 7 8 9 10
0 0 0 0 0 0 0 0 0.27 0.21 0.41 0.31
1 0 0 0 0 0.0012 0.31 0.24 0.44 0.33 0.48 0.36
2 0 0 0.12 0.37 0.31 0.47 0.36 0.49 0.37 0.50 0.38
3 0 0.49 0.37 0.50 0.38 0.50 0.38 0.50 0.38 0.50 0.38
4 0.49 0.50 0.38 0.50 0.38 0.50 0.38 0.50 0.38 0.50 0.38
5 0.0039 0.50 0.38 0.50 0.38 0.50 0.38 0.50 0.38 0.50 0.38

4.2.1 BDD↩︎

For primitive BCH codes, the miscorrection probability is zero for \(U \leq t\) and is approximately \(\frac{1}{t!}\) for \(U>t\).

For eBCH codes, odd-weight codewords of weight \(w\) in the primitive code are mapped to codewords of weight \(w+1\) in the extended code. Using this property, and by slightly extending the results of [@mceliece1986decoder], it was shown in [@Miao26IZS] that the miscorrection probability is zero for \(U \leq t\). For \(U>t\), the value is nearly zero if \(U+t\) is odd. If \(U+t\) is even, it is approximately \(\frac{1}{t!}\).

4.2.2 EaED↩︎

We consider the commonly used case with \({\undefined{J}=1}\).

For primitive BCH codes, the miscorrection probability is zero when \(2U + E < d_{\mathrm{min}}\). When \(2U + E \gg d_{\mathrm{min}}\), the miscorrection probability is close to \({1 - (1-\left(\frac{1}{t!}\right))^2 }\). For values of \(2U + E\) that are slightly above \(d_{\mathrm{min}}\), the miscorrection probability increases from zero to \({1 - (1-\left(\frac{1}{t!}\right))^2 }\).

For eBCH codes, the results do not admit a simple closed-form approximation. In Tab. 1 and Tab. 2, we list the decoding success and miscorrection probabilities when decoding the \([256,239,6]\) eBCH code with \(U\) errors and \(E\) erasures. As observed from the numerical results, the decoding success probability does not drop abruptly to zero once \(2U+E\) exceeds \(d_{\mathrm{min}}-1\); instead, it decreases from \(1\) to \(0\). However, for large values of \(2U+E\), the miscorrection probability increases compared to that of conventional BDD, which is listed in the first column of Tab. 2.

The decoding success-rate analysis motivates lines 5–6 of Algorithm 5, which allow decoding when \(E=d_{\mathrm{min}}\), a case not permitted in conventional EaE decoding [@MoonBook]. The success and miscorrection rates show that EaED provides a low-complexity method for decoding beyond the minimum distance using BDD, albeit at the cost of an increased miscorrection probability. This highlights the need for effective miscorrection detection by exploiting soft information.

5 RDRSD Algorithm↩︎

In this section, we present the RDRSD, which improves upon the conventional DRSD [@miao2022JLT]. The block and windowed versions are summarized in Algorithm 6 and Algorithm 7, respectively, and described in detail below.

5.1 Refined Dynamic Reliability Scores (DRSs)↩︎

The DRS serves a role similar to soft information, such as LLRs, in soft-decision decoding algorithms. Specifically, it assigns a reliability score to each bit in a GPC, with higher scores indicating higher reliability. We denote the vector of bit DRS values by \(\boldsymbol{D}=(D_1,D_2,\ldots,D_N)\).

The entries of \(\boldsymbol{D}\) are quantized using \(q\) bits, giving the score range \(\{0,1,\ldots,2^q-1\}\). They are updated through hard messages, i.e., one-bit signals that indicate, for example, whether a score should be increased by one or left unchanged. Similarly to iBDD, the DRS uses an intrinsic message-passing mechanism: after initialization, the channel output is not stored separately. Once the channel observations have been converted into \(\boldsymbol{D}\), decoding proceeds solely based on the DRS values, the ternary data buffer, and the syndrome buffer, which are updated directly throughout the iterations.

5.1.1 Initialization↩︎

The bit DRS \(D_i\) is initialized using precomputed thresholds. If \(|\tilde{y}_i|\in[T_{d},T_{d+1})\), where \(T_{d}\) and \(T_{d+1}\) are the thresholds associated with \(d\) and \(d+1\), respectively, then \(D_i=d\). Following [@miao2022JLT; @Rapp24ECOC], these thresholds are chosen such that the initial values of \(D_i\) are assigned to asymptotically equal-sized reliability classes. Let \(\lambda = D_{\max} - D_{\min}+1\) denote the number of initial reliability classes. With channel symmetry and equiprobable inputs, it is sufficient to compute the threshold probabilities from the distribution of \(|\tilde{Y}|\). The thresholds are chosen to satisfy \(\Pr\!\big(T_{d}\leq |\tilde{Y}| < T_{d+1}\big) = \frac{1}{\lambda}.\) For the BI-AWGN channel, this condition becomes \[\begin{align} &Q\!\big(\tfrac{T_d-1}{\sigma}\big) - Q\!\big(\tfrac{T_{d+1}-1}{\sigma}\big) + Q\!\big(\tfrac{T_d+1}{\sigma}\big) - Q\!\big(\tfrac{T_{d+1}+1}{\sigma}\big) = \tfrac{1}{\lambda}, \end{align}\] with \(T_{D_{\min}}=0\) and \(T_{D_{\max}+1}=\infty.\) In addition, for the RDRSD, we propose to use a CN reliability score, or CN DRS, which quantifies the reliability of a CN after decoding. We denote the vector of CN DRS values by \(\boldsymbol{D}_{\text{CN}}=(D_{\text{CN},1},D_{\text{CN},2},\ldots,D_{\text{CN},M})\). In GPCs, a decoded codeword that passes the miscorrection check is considered highly reliable [@hager2018approaching]. We therefore assign a relatively high initial value \(d_0\) to the corresponding entry of \(\boldsymbol{D}_{\text{CN}}\) and increase it further for each iteration in which the decoded codeword remains unchanged. Here, \(d_0\) is code-dependent.

During decoding, the reliability value used for the \(\kappa\)-th bit of the currently decoded CN \(\mathsf{c}_j\) is \(D_{\text{CN},\phi_{\mathsf{c}\shortrightarrow\mathsf{c}}(j,\kappa)}\) if the CN \(\mathsf{c}_{\phi_{\mathsf{c}\shortrightarrow\mathsf{c}}(j,\kappa)}\) is already a valid codeword. Otherwise, it is \(D_{\phi_{\mathsf{c}\shortrightarrow\mathsf{v}}(j,\kappa)}\).

5.1.2 Miscorrection Detection with DRS↩︎

The key idea inherited from DRSD is to exploit the soft information provided by the DRS to assist EaED, so that its behavior approaches that of an ideal EaED in which all miscorrections are discarded. As shown in Algorithm 5, whenever BDD outputs a valid codeword, a DRS-based miscorrection detection step is performed. This step is described in detail below.

The first approach for miscorrection detection is based on anchor bits, i.e., highly reliable bits whose \(D_i\) values exceed a threshold \(\mathsf{T}_{\text{a}}\), where \(\mathsf{T}_{\text{a}}\) is an optimizable parameter. Any BDD output that conflicts with an anchor bit, i.e., attempts to flip it, is declared a miscorrection and discarded. As shown in [@Miao26IZS], this simple approach can keep the miscorrection probability below \(0.01\) under moderate channel conditions.

An alternative approach can be used in addition to the anchor bits. For a BDD output \(\boldsymbol{w}\), we compute the sum of the \(D_i\) values over the flipped positions, i.e., \(\sum_{i:w_i\neq y_i,\, y_i\neq \mathord{?}} D_i\). If this sum exceeds a threshold \(\mathsf{T}_{\text{e}}\), the codeword is also declared a miscorrection and discarded.

Figure 6: RDRSD of block GPCs
Figure 7: Windowed RDRSD of SC GPCs

In practice, both miscorrection detection methods can be enabled simultaneously, particularly when \(\undefined{J}>1\). Overall, a BDD decision is declared a miscorrection if \[\begin{align} \label{eq:miscorrectionCheck} \{i : w_i \neq y_i,\, y_i \neq \mathord{?}, D_i > \mathsf{T}_{\text{a}}^{(\ell)}\}\neq \emptyset \\ \nonumber \text{ or } \sum_{i:w_i\neq y_i,\, y_i\neq \mathord{?}} D_i > \mathsf{T}_{\text{e}}^{(\ell)}. \end{align}\tag{2}\] The thresholds \(\mathsf{T}_{\text{a}}^{(\ell)}\) and \(\mathsf{T}_{\text{e}}^{(\ell)}\) are updated according to the current iteration number \(\ell\). A simple update strategy is to increase both thresholds every five iterations, as in [@miao2022JLT].

5.1.3 Updating DRSs↩︎

At the beginning of each CN decoding step for \(\mathsf{c}_j\), if the corresponding CN word is already a valid codeword, \(D_{\text{CN},j}\) is increased by \(1\). Otherwise, the CN word is decoded using Algorithm 5. After the EaED decision is made, the \(D_i\) values of the bits that conflict with any BDD decision, i.e., the bits in \(\undefined{F}\), are decreased by \(1\). All updated entries of \(\boldsymbol{D}\) and \(\boldsymbol{D}_{\text{CN}}\) are clipped to the range \([0,2^q-1]\).

5.2 Decoding Algorithm↩︎

We first describe the RDRSD algorithm for block GPCs, which is summarized in Algorithm 6.

At the beginning of decoding, the data buffer is initialized with ternary decisions obtained from the channel output. If \(\tilde{y}\in[-\mathsf{T},\mathsf{T}]\), an erasure is declared, i.e., \(y=\mathord{?}\). Otherwise, the hard decision is given by \(y=\psi(\tilde{y})\in\{0,1\}\). The syndrome of each CN is then computed by treating the erased bits as zero, i.e., erased bits do not contribute to the syndrome.

In addition to initializing the data and syndrome buffers, \(\boldsymbol{D}\) is initialized as described in Sec. 5.1.1, whereas all entries of \(\boldsymbol{D}_{\text{CN}}\) are set to a code-dependent initial value \(d_{0}\). Decoding then proceeds iteratively. In each iteration, all CNs decode their associated bits using EaED with miscorrection detection. After each CN decision, the bits in the identified error-location set are flipped, the corresponding syndrome buffers of the two involved component codes are updated, and the affected entries of \(\boldsymbol{D}\) and \(\boldsymbol{D}_{\text{CN}}\) are updated. This process is repeated until all syndromes are zero and no erasures remain, or until the maximum number of iterations \(L\) is reached.

For SC GPCs, we employ windowed RDRSD, whose routine is similar to that for block GPCs within a decoding window. The only difference is that the thresholds \(\mathsf{T}_{\text{a}}\) and \(\mathsf{T}_{\text{e}}\) should be configured based on the effective CN decoding count, determined by the iteration index and the CN position within the window. Algorithm 7 summarizes the windowed RDRSD algorithm.

5.3 Complexity Analysis↩︎

Figure 8: BDD executions per CN in a PC with [256,239,6] eBCH component code when decoding using iBDD and RDRSD with different \undefined{J} values.

5.3.1 Computational Complexity↩︎

a

b

c

d

e

f

Figure 9: Post-FEC BER performance of the RDRSD for GPCs based on eBCH component codes with different component-code lengths \(n\) and error-correction capabilities \(t\). The entries of \(\boldsymbol{D}\) and \(\boldsymbol{D}_{\text{CN}}\) use \(q=4\) bits. Dashed and solid curves correspond to iBDD and RDRSD, respectively, colors distinguish PCs and staircase codes, and markers indicate \(\undefined{J}\).. a — image, b — image, c — image, d — image, e — image, f — image

The initialization complexity of the RDRSD is \(\undefined{O}(N)\), as in iBDD. During iterative decoding, compared with iBDD, the additional operations are limited to simple integer comparisons, additions, increments/decrements, and clipping operations on \(q\)-bit entries of \(\boldsymbol{D}\) and \(\boldsymbol{D}_{\text{CN}}\). In particular, the DRS-based miscorrection detection only requires checking whether the \(D_i\) value of any flipped position exceeds \(\mathsf{T}_{\text{a}}\), and optionally accumulating the \(D_i\) values over the flipped positions and comparing the result with \(\mathsf{T}_{\text{e}}\). Since the number of flipped positions is bounded by the correction capability \(t\) of the component code, this additional complexity is small compared with algebraic component decoding. Therefore, the computational complexity of the RDRSD is dominated by the component-code EaED operations, similarly to syndrome-domain iBDD.

In Fig. 8, we compare the number of BDD executions per CN for the RDRSD and iBDD on the \([256,239,6]\) eBCH-code-based PC across different \(E_{\text{b}}/N_{\text{0}}\) values. In the waterfall region, iBDD requires approximately \(1.3\) to \(16.6\) BDD executions per CN, while at high SNR, most frames are decoded within a few iterations and the number of BDD executions per CN approaches \(1\). In contrast, the RDRSD performs more BDD executions in the low- and high-SNR regions due to its list-based EaED operations, but fewer in the moderate-SNR region because it can terminate earlier than iBDD, which often uses all \(20\) iterations after failing to converge. A practical comparison should therefore focus on the operating regions where the post-decoding BER of each decoder is low. For example, Fig. 9-(b) shows that the target post-decoding BER of \(10^{-9}\) is reached above approximately \(\SI{5.2}{dB}\) for iBDD and \(\SI{4.5}{dB}\) for the RDRSD. At high SNR, e.g., for \(E_{\text{b}}/N_{\text{0}}\geq\SI{4.8}{dB}\), the RDRSD requires roughly \(\undefined{J}\) times as many BDD executions as iBDD, which is still below the worst-case list-size estimate because most erasures are resolved in the first few iterations and later RDRSD iterations mainly process CNs with \(E=0\), requiring only one BDD step.

5.3.2 Memory↩︎

The RDRSD requires a ternary data buffer of \(2N\) bits, a syndrome buffer of \(btM\) bits, a bit-DRS buffer storing \(\boldsymbol{D}\) with \(qN\) bits, and a CN-DRS buffer storing \(\boldsymbol{D}_{\text{CN}}\) with \(qM\) bits. For a block GPC with \(N\) VNs, \(M\) CNs, and component BCH code with error-correcting capability \(t\), the total memory is approximately \(M_{\text{rDRSD}}\approx (q+2)N + (q+bt)M \quad \text{bits}.\)

5.3.3 Internal Decoder Data Flow↩︎

The RDRSD also preserves the low-data-flow advantage of syndrome-domain iBDD. After initialization, it operates only on the ternary data buffer, the syndrome buffers, and the quantized \(q\)-bit entries of \(\boldsymbol{D}\) and \(\boldsymbol{D}_{\text{CN}}\). Thus, unlike SDD algorithms, which pass multi-bit soft messages along all graph edges in every iteration, the RDRSD yields only a limited additional internal data flow. During each CN decoding step, this consists of reading and updating the \(bt\)-bit syndrome, reading the \(E\) erased positions, updating the \(E\) erasures with binary values after the EaED step, flipping up to \(t\) additional data bits, and sending decrease signals for up to \(2\undefined{J}t\) entries of \(\boldsymbol{D}\).

6 Numerical Results of the Waterfall Region↩︎

This section presents post-decoding BER results for selected PCs and staircase codes with various component codes. The decoder parameters are optimized using Optuna [@optuna_2019] with the tree-structured Parzen estimator (TPE) sampler, a sequential model-based optimization method. For each considered code and decoder configuration, we define a search space for \(\mathsf{T}\), \(d_0\), \(\mathsf{T}_{\text{a}}\), \(\mathsf{T}_{\text{e}}\), and their iteration-dependent update schedules. Each Optuna trial corresponds to one parameter configuration of the proposed RDRSD. The decoder is then instantiated and evaluated by Monte-Carlo simulation at representative \(E_{\text{b}}/N_{\text{0}}\) values in the waterfall region. The resulting post-FEC BER is used as the objective value to be minimized. Based on completed trials, Optuna builds probabilistic surrogate models of promising and non-promising parameter regions and samples new candidates preferentially from the promising regions.

Fig. 9 shows the post-FEC BER performance of GPCs based on eBCH component codes with \(t=2\) and \(t=3\). Tab. 3 further summarizes, for PCs, the decoding gain in \(E_{\text{b}}/N_{\text{0}}\) at a target BER of \(10^{-8}\) relative to the iBDD algorithm. For the PC comparisons in Tab. 3, all decoders use 20 iterations. The RDRSD uses \(q=4\)-bit entries for \(\boldsymbol{D}\) and \(\boldsymbol{D}_{\text{CN}}\), whereas conventional DRSD uses \(q=5\). Despite the lower-precision reliability scores and reduced internal data flow, the RDRSD achieves larger gains than conventional DRSD. For PCs with large block length \(n\) and \(t=3\), the list decoding option gives a particularly noticeable improvement. Similar trends are observed for staircase codes. To keep the figure readable, we therefore show only RDRSD with \(\undefined{J}=3\), except for the \([128,2]\)-based staircase code, where \(\undefined{J}=1\) and \(\undefined{J}=3\) perform similarly.

For \(t=2\) codes, the RDRSD achieves a small reduction in the error floor compared to iBDD, but the resulting floors may still be too high for some FEC applications. For codes with \(t=3\), no error floors are observed for either iBDD or the RDRSD within the simulated range. Estimates in [@staircaseCode] indicate that the error floors of such GPCs are below \(10^{-20}\) and thus negligible for most practical applications. Since many systems still use \(t=2\) component codes due to their low decoding complexity, we study their error-floor behavior in detail and propose new post-processing techniques to lower the error floors in the next sections.

Table 3: Decoding gain with respect to iBDD at a target post-FEC BER of \(10^{-8}\) for PCs with different \([n,t]\) eBCH component codes, where \(n\) is the component-code length and \(t\) is the error-correcting capability.
\([128,2]\) \([256,2]\) \([512,2]\) \([256,3]\) \([512,3]\)
RDRSD (\(\mathcal{J}=3\)) \(1.30\) \(0.95\) \(0.85\) \(0.96\) \(0.79\)
DRSD [@miao2022JLT] \(1.14\) \(0.89\) \(0.69\) \(0.62\) \(0.51\)

7 Error Floor Analysis↩︎

7.1 Stall Patterns↩︎

In this section, we define error-only stall patterns, which are the dominant mechanism behind error floors in iterative decoding of GPCs. An error floor is the high-SNR regime in which the steep waterfall transition turns into a slow decrease of the post-decoding error rate. The shape of an error-only stall pattern depends on the GPC structure. For clarity, we use PCs to present the theoretical and simulation results.

Definition 1. An error-only stall pattern \(\undefined{S}\) is defined as a set of erroneous bit positions such that each involved CN contains at least \(t+1\) erroneous bits.

For an error-only stall pattern in a PC, we define \(K\) and \(L\) as the numbers of involved rows and columns, respectively. Specifically, an involved row or column contains at least one error in the stall pattern. By ignoring positions outside the stall pattern, we can represent the stall pattern on a \(K\times L\) grid. For PCs, it is easy to see that the smallest error-only stall pattern involving \(K\) rows and \(L\) columns has size \[\label{eq:smallestS} |\undefined{S}|_{\min} = \max\{K,L\}\cdot (t+1).\tag{3}\]

A minimum error-only stall pattern is defined as the case \(K=L=t+1\). For example, Fig. 10 depicts a minimum stall pattern involving three row CNs and three column CNs.

Figure 10: A minimum error-only stall pattern for a PC based on t=2 component codes.

7.2 Union Bound of Miscorrection-Free Decoding↩︎

The error floor can be approximated by enumerating possible stall patterns and summing their contributions to the post-decoding BER, assuming that a sufficient number of iterations has been performed to remove all errors outside the stall patterns. In this section, we first review the union-bound method for iBDD proposed in [@staircaseCode] and then extend this approach to miscorrection-free EaE decoding.

7.2.1 For iBDD↩︎

For fixed \(K\) and \(L\), the BER contribution of stall patterns involving \(K\) rows and \(L\) columns is approximated by \[\label{eq:iBDDfloor} \sum_{l=(t+1)\cdot \max \{K,L\}}^{KL}\binom{n}{K}\binom{n}{L}\frac{l}{n^2}M_{K,L}^l \cdot \delta^l,\tag{4}\] where \(\delta\) denotes the crossover probability of the BSC, and \(M_{K,L}^l\) is the number of stall patterns of size \(l\) that can be arranged within \(K\) fixed rows and \(L\) fixed columns. To estimate the overall error floor, 4 is evaluated over a range of values of \(K\) and \(L\), and the resulting contributions are accumulated. In practice, a typical choice is \(t+1\leq K,L \leq 2t+3\), since larger values of \(K\) and \(L\) usually lead to negligible contributions due to the factor \(\delta^l\).

In [@staircaseCode], an upper bound on \(M_{K,L}^l\) was proposed, while [@holzbaur2019improved] provides both an exact computation method and an approximation. Since the exact computation of \(M_{K,L}^l\) is computationally intensive, we use the sampling-based approximation in [@holzbaur2019improved], which was shown to be close to the exact values. The resulting union bound for the PC with \([256,239,6]\) eBCH component code is shown by the \(\mathsf{T}=0\) union-bound curve in Fig. 11.

7.2.2 For Ideal iEaED↩︎

For EaE decoding described in Sec. 4 followed by perfect miscorrection detection, we consider three types of stall patterns.

Figure 11: Comparison of simulated RDRSD, ideal iEaED, and the computed union bound for different erasure thresholds \mathsf{T} for the product code with [256,239,6] eBCH component code.

Type-I stall patterns contain errors whose positions already form an error-only stall pattern and may also contain erasures. That is, the errors are located within \(K\) involved rows and \(L\) involved columns, and each involved row and column contains at least \(t+1\) errors, irrespective of the erasures inside the \(K\times L\) grid. Such stall patterns are therefore dominated by errors. An example is shown in Fig. 12-(a).

We next consider the effect of erasures within a Type-I stall pattern. For fixed \(K\) and \(L\), the number of erasures is upper bounded by \(KL-\max\{K,L\}(t+1)\) according to 3 . Since the error floor is dominated by stall patterns with small \(K\) and \(L\), and each erasure contributes on average only half an error, the additional contribution due to erasures is small. Consequently, the resulting error rate remains of the same order as that obtained when erasures inside the stall pattern are neglected.

Type-II stall patterns contain erasures and errors whose error positions alone do not form a stall pattern. However, for each involved row and column, if \(U\) and \(E\) denote the number of errors and erasures, respectively, then \(2U+E\geq d_{\mathrm{min}}.\) An example is shown in Fig. 12-(b) for \(t=2\). For algebraic EaE decoding, such patterns will give a non-negligible contribution to the error floor that is difficult to estimate. However, for the EaED considered in this work, such patterns are less critical. As shown in [@miao2022JLT], a miscorrection-free ideal EaED step resolves two errors and two erasures with probability \(p=\frac{1}{2}\). Moreover, for values of \(U\) and \(E\) such that \(2U+E\) exceeds \(d_{\mathrm{min}}\) only slightly, e.g., by \(1\), \(2\), or \(3\), the probability \(p\) remains close to \(\frac{1}{2}\). Since a stall pattern can be recovered with high probability once any of its involved CNs is recovered, repeated independent random trials across iterations make the survival probability \((1-p)^m\) decrease rapidly with the iteration number \(m\).

Type-III stall patterns consist only of erasures, e.g., as shown in Fig. 12-(c). For pure erasures, the smallest stall pattern has size \(d_{\mathrm{min}}\times d_{\mathrm{min}}\), since each involved row and column must contain at least \(d_{\mathrm{min}}\) erasures. Assuming independent erasures with probability \(\epsilon_{\text{c}}=0.02\), which corresponds to PC decoding in the error-floor region, the contribution of the smallest Type-III stall patterns for the \([256,239,6]\)-eBCH code-based PC is approximated by \[\binom{256}{6}^2 \epsilon_{\text{c}}^{36} \frac{36}{256^2} \approx 5.1\cdot 10^{-42}\] erasures per bit. This contribution is negligible compared with the error-dominated stall-pattern contribution.

Under this miscorrection-free, error-dominated approximation, the error floor contribution for stall patterns on a \(K\times L\) grid for ideal iEaED is approximated as \[\label{eq:EaEfloor} \sum_{l=(t+1)\cdot \max \{K,L\}}^{KL}\binom{n}{K}\binom{n}{L}\frac{l}{n^2}M_{K,L}^l \cdot \delta_{\text{c}}^l.\tag{5}\] Compared with the ideal iBDD case in 4 , the only difference in the approximation is to replace the crossover probability \(\delta\) of the BSC by the error probability \(\delta_{\text{c}}\) of the EaE channel computed by 1 .

Figure 12: Examples of Type-I, Type-II, and Type-III stall patterns for EaE decoding of a PC with t=2. Cross marks indicate errors, and question marks indicate erasures.

Fig. 11 shows the union bound computed for different erasure thresholds \(\mathsf{T}\). First, increasing \(\mathsf{T}\) lowers the error floor because the error probability \(\delta_{\text{c}}= Q\left(\frac{\mathsf{T}+1}{\sigma}\right)\) of the EaE channel decreases with \(\mathsf{T}\), while the contribution of pure-erasure stall patterns remains negligible in the considered range of \(E_{\text{b}}/N_{\text{0}}\). Second, the performance of ideal iEaED converges to the computed error-floor bound at high \(E_{\text{b}}/N_{\text{0}}\). Finally, the RDRSD follows the behavior of ideal iEaED closely, particularly for small \(\mathsf{T}\), where miscorrection detection is almost perfect.

7.3 Error Floor with Miscorrections↩︎

In [@staircaseCode], miscorrections are accounted for by replacing \(\delta\) in 4 with \(\delta+\zeta\), where \(\zeta\) denotes the per-bit miscorrection probability estimated by simulation under the assumption that miscorrections occur independently as Bernoulli events for each bit. For the RDRSD, however, this correction is not sufficiently accurate. The miscorrection probability of the RDRSD is typically much smaller than the input error and erasure probabilities. For example, for the \([256,239,6]\) eBCH-code-based PC at \(E_{\text{b}}/N_{\text{0}}=\SI{4.35}{dB}\), our numerical simulations estimate that the average number of miscorrected bits accumulated over \(20\) decoding iterations, normalized per code bit, is \(1.3\cdot 10^{-4}\). This is only in the order of \(1\%\) of the input error and erasure probabilities, \(\delta_{\text{c}}\) and \(\epsilon_{\text{c}}\), respectively. Such a small offset has almost no effect on the union bound computed from 5 . Nevertheless, as shown for the \(\mathsf{T}=0.12\) case in Fig. 11, the RDRSD exhibits a noticeably higher error floor than the computed bound. This suggests that the remaining miscorrections cannot be modeled as independent random errors. To the best of our knowledge, no accurate analytical method is available for this case; hence, Monte-Carlo simulations are required to estimate the true error floor, while the miscorrection-free bound serves as a useful reference for guiding the simulation design.

8 Stall Pattern Removal via Post-Processing↩︎

Many small error-only stall patterns can be identified from the remaining nonzero CN syndromes after iterative decoding. For example, with a \(t=2\) component code, a minimum error-only stall pattern can be detected from the intersection of three failed row CNs and three failed column CNs. Conventional post-processing methods for such patterns can be broadly classified into flip-and-iterate and erase-and-iterate approaches. In both cases, rows and columns with nonzero syndromes are first marked. Then, selected bits at their intersections are flipped or erased, followed by additional iBDD or iterative algebraic EaE decoding iterations.

Flip-and-iterate post-processing has been applied to braided codes in [@Jian2013] and to OFEC codes in [@rapp2021error; @lagendijk2025lowering], while erase-and-iterate post-processing has been studied for HPCs in [@emmadi2015half] and product codes in [@condo2016stall]. In this section, we examine the success and failure conditions of both techniques and then propose a soft-aided post-processing method that resolves certain failure cases not addressed by existing approaches.

We evaluate the \([256,239,6]\) eBCH-code-based PC because this component code is widely used, e.g., in OFEC [@openroadmOpenROADMMSA2021], and its comparatively high PC error floor permits feasible Monte Carlo simulation.

8.1 Correction Guarantee of Conventional Post-Processing Approaches↩︎

Theorem 1 unifies guarantees previously proven for separate cases [@holzbaur2019improved; @Jian2013; @hager2018approaching] and characterizes the stall patterns corrected by both approaches.

Theorem 1. Consider a product code with eBCH component codes of minimum distance \(d_{\mathrm{min}}=2t+2\). Assume that no errors exist outside the error-only stall pattern, that the error-only stall pattern is fully identified by \(K\) failed row CNs and \(L\) failed column CNs, and that no undetectable component-code errors are present. If \(L\leq 2t+1\), then both flip-and-iterate and erase-and-iterate post-processing resolve the stall pattern when the subsequent decoding iteration starts with row decoding. Similarly, if \(K\leq 2t+1\), both methods resolve the stall pattern when the subsequent decoding iteration starts with column decoding.

Proof. Let \(r_i\) denote the number of errors in the \(i\)-th involved row and \(s_j\) the number of errors in the \(j\)-th involved column. From the definition of error-only stall patterns, \(r_i\geq t+1\) and \(s_j\geq t+1\).

First consider the flip-and-iterate method. If \(L\leq 2t+1\), then after flipping all \(K L\) intersection bits, the number of errors in the \(i\)-th involved row becomes \(L-r_i\). Since \(r_i\geq t+1\), we have \[L-r_i \leq L-(t+1) \leq t .\] Hence, all involved rows are correctable by one row-decoding half-iteration. The case for \(K\leq 2t+1\) follows analogously.

Now consider the erase-and-iterate method. If \(L\leq 2t+1=d_{\mathrm{min}}-1\), then after erasing all intersection bits, each involved row contains at most \(L<d_{\mathrm{min}}\) erasures and no residual errors in the marked positions. Therefore, each involved row is uniquely recoverable by algebraic erasure decoding. Analogously, if \(K\leq 2t+1=d_{\mathrm{min}}-1\), each involved column contains fewer than \(d_{\mathrm{min}}\) erasures and is recoverable. ◻

Figure 13: A large stall pattern whose complementary pattern is again a stall pattern of smaller size. A cross represents an error within a stall pattern, while a circle represents an error outside a stall pattern.

A direct consequence of Theorem 1 is that, for PCs with eBCH component codes, all error-only stall patterns satisfying \({|\undefined{S}| < (t+1)d_{\mathrm{min}}}\) can be resolved by both flip-and-iterate and erase-and-iterate post-processing. Since each involved row and column contains at least \(t+1\) errors, we have \[|\undefined{S}| \geq (t+1)\max\{K,L\}.\] Together with \(|\undefined{S}| < (t+1)d_{\mathrm{min}}\), this implies \({\max\{K,L\} < d_{\mathrm{min}}}.\) Hence, no undetectable component-code error can be present as an undetectable error would require at least \(d_{\mathrm{min}}\) erroneous positions. Since \(\max\{K,L\}<d_{\mathrm{min}}=2t+2\), we have \(\max\{K,L\}\leq 2t+1\), and the stall pattern is correctable by Theorem 1.

When \(\min\{K,L\}\geq 2t+2\), such a guarantee no longer exists.

Figure 14: RDRSD with Post-Processing for Stall Pattern Removal
Figure 15: Post-decoding FER of the [256,239,6] eBCH-code-based PC under rejection-sampling-based evaluation for injected stall patterns with dimensions {(K,L)\in\{(3,3),(3,4),(3,5),(4,4)\}}. The proposed soft-aided post-processing (PP) technique is compared with conventional post-processing [@holzbaur2019improved] and RDRSD without post-processing.

8.2 Dealing with Large Stall Patterns↩︎

Large stall patterns outside the scope of Theorem 1 may lead to non-deterministic post-processing outcomes due to several failure mechanisms. We next analyze these mechanisms and discuss possible approaches to mitigate them.

First, if the number of preceding decoding iterations is insufficient, residual errors may remain outside the identified stall pattern. In this case, the marked CN set is inaccurate, leading to an unpredictable post-processing outcome. This issue is most pronounced when the SNR is not sufficiently high. To mitigate it, we skip post-processing when the detected stall pattern is too large. Specifically, in our implementation, post-processing is skipped if \(K\geq d_{\mathrm{min}}\) and \(L\geq d_{\mathrm{min}}\), and at least one of \(K\) and \(L\) exceeds \(d_{\mathrm{min}}+2\).

Second, undetectable miscorrections can cause some erroneous CNs to remain unmarked. This issue can be partially reduced by enlarging the marked CN set. One approach, proposed in [@hager2018approaching], records the corrected positions of each CN during iterative decoding. A row CN is then added to the marked set if its corrected positions form a subset of the currently marked column CNs; column CNs are treated analogously. Another approach, proposed in [@lagendijk2025lowering], adds CNs that performed corrections in the last iteration to the marked set, thereby helping to identify CNs involved in miscorrection loops. We adopt both methods in our post-processing step. In Algorithm 14, the subset-based enlargement is represented by the two conditional loops after the initial marking step, while CNs that fail or correct bits in the probing iBDD iteration are recorded before these loops.

Third, in the presence of large stall patterns, subsequent iBDD/iEaED iterations after the bit flipping/erasing may cause miscorrections, which further introduce new errors outside of the current stall pattern. This effect can be partly mitigated by restricting the following corrections to the marked CNs.

Finally, for large stall patterns, flipping all marked bits may transform the original pattern into another stall pattern. An example is shown in Fig. 13. Similarly, erase-and-iterate post-processing may create a Type-III stall pattern consisting only of erasures. This issue can be mitigated by allowing multiple rounds of post-processing steps, as also used in [@holzbaur2019improved; @lagendijk2025lowering]. Another approach is to only flip part of the marked bits, e.g., by flipping only one row of a large marked stall pattern before resuming iBDD [@holzbaur2019improved]. To address this issue, we propose a soft-aided partial-erasure approach. For each bit \(i\) located at the intersection of a marked row CN and a marked column CN, a random integer \(R_i\) is drawn uniformly from \(\{0,1,\ldots,2^q-1\}\). The bit is erased if \(R_i \geq 2D_i,\) where \(D_i\) denotes the bit DRS. Thus, bits with smaller DRS values are more likely to be erased, while highly reliable bits are preserved with high probability.

Motivated by the preceding enumeration of failure mechanisms, Algorithm 14 summarizes the proposed post-processing procedure, which combines existing techniques with the modifications introduced in this work. The algorithm is applied after the regular \(L\) iterations of RDRSD. During post-processing, miscorrection detection is disabled to avoid the effect of persistently misidentified anchor bits. Otherwise, such anchor bits may repeatedly reject the corrections needed to break a stall pattern.

8.3 Evaluation of the Post-Processing Techniques↩︎

Figure 16: Post-FEC BER performance of the product code with [256,239,6] eBCH component codes, comparing iBDD, RDRSD, and post-processing-based decoding schemes. The error bars indicate 95\% confidence intervals.

We benchmark the proposed soft-aided post-processing (PP) technique against the method of [@holzbaur2019improved]. Because post-processing operates in the error-floor region, where the post-decoding FER is very low, conventional Monte-Carlo simulation is computationally demanding. We therefore propose a rejection-sampling-based simulation method.

For each simulated error pattern, we randomly select \(K\) rows and \(L\) columns and condition the \(K\times L\) intersection bits on hard-decision errors. For each transmitted bit \(x\), we draw \(r\sim\undefined{N}(0,\sigma^2)\) and reject the sample unless \(\psi\bigl(\mu(x)+r\bigr)\neq x .\) All remaining bits are generated according to the original channel model with independent noise \({r\sim\undefined{N}(0,\sigma^2)}\). This inserts a \(K\times L\) hard-decision stall pattern while preserving the soft information distribution according to the channel condition.5 To gain insight into the post-processing techniques, we consider four dimensions \((K,L)\), namely \((3,3)\), \((3,4)\), \((3,5)\), and \((4,4)\), for the \([256,239,6]\) eBCH-code-based PC. The corresponding results are shown in Fig. 15.

With RDRSD, a large fraction of the sampled stall patterns is already resolved during iterative decoding, since unreliable positions can be declared as erasures and subsequently recovered. In contrast, for iBDD without post-processing, the post-decoding FER remains close to \(1\) for all sampled patterns, as iBDD cannot resolve such patterns unless rare miscorrections remove some of the errors.

Both post-processing techniques resolve small stall patterns with high probability. Across the considered cases, the proposed soft-aided post-processing technique outperforms the method of [@holzbaur2019improved]. For the injected \((4,4)\) stall patterns, however, both methods show limited effectiveness, since these patterns can evolve into larger stall patterns if miscorrections turn component words with four errors into valid codewords.

In Fig. 16, post-processing is applied to both iBDD and RDRSD, and regular Monte Carlo simulations are performed to show the actual post-decoding BER performance. For iBDD, we use the method of [@holzbaur2019improved], whereas for RDRSD, we apply the proposed Algorithm 14. After post-processing, both decoders achieve significantly lower error rates than their counterparts without post-processing and also perform below the computed union bound (UB) for the miscorrection-free case. For example, for RDRSD, the union bound predicts an error floor around a BER of \(10^{-10}\). With post-processing, the steep decrease continues down to approximately \(10^{-12}\). Below this level, the curve decreases more gradually due to the non-deterministic outcomes discussed in Sec. 8.2, but no error floor appears within the simulated range. At \(E_{\text{b}}/N_{\text{0}}=\SI{4.5}{dB}\), no errors occurred in \(1.5503\cdot 10^{11}\) simulated PC blocks. Assuming independent events of \(36\) erroneous bits per \(65536\)-bit block, the zero-count Poisson interval [@van2011statistical] gives the one-sided \(95\%\) BER upper bound \(1.06\cdot 10^{-14}\) shown in Fig. 16.

9 Conclusion↩︎

In this paper, we presented the RDRSD decoder for GPCs. Compared with conventional DRSD, the proposed refinement reduces internal decoder data flow and memory requirements by maintaining a syndrome-domain implementation that is compatible with existing iBDD architectures, while preserving a large decoding gain in the waterfall region. We also derived a union bound on the error floor of miscorrection-free error-and-erasure decoding and showed that the RDRSD approaches this bound in the error-floor region. For PCs with component codes of small minimum distance, we proposed a soft-aided post-processing technique that further reduces the error floor. The combination of high decoding gain, reduced implementation overhead, and low error floors makes the proposed decoder a promising candidate for future low-complexity optical communication systems. An open-source implementation is provided at https://github.com/kit-cel/DRSD4GPCs.

Acknowledgement↩︎

The authors would like to thank F. Ritter, H. Jäkel, S. Obermüller, and L. Rapp for the helpful discussion.


  1. This work has received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement No. 101001899) and the German Federal Ministry of Research, Technology and Space (BMFTR) under grant agreement 16KIS2081 (PONGO).↩︎

  2. All authors are with Karlsruhe Institute of Technology (KIT), Communications Engineering Lab (CEL), Hertzstr. 16, 76187 Karlsruhe, Germany. E-mail: {laurent.schmalen@kit.edu}↩︎

  3. Throughout this work, all considered primitive BCH codes saturate this bound, i.e., \(d_{\mathrm{min}}=d_{\mathrm{des}}\).↩︎

  4. The even-weight BCH subcode performs almost identically in our simulations; hence, we consider only eBCH codes.↩︎

  5. A related evaluation approach was used in [@holzbaur2019improved], where a dedicated channel was constructed to deliberately insert certain stall patterns. This approach is not directly suitable here, since the soft information associated with the received values affects the behavior of the proposed decoder and post-processing method.↩︎