1 Introduction↩︎

1.1 Motivation↩︎

As the field of quantum computing continues to mature, quantum neural networks are becoming an increasingly attractive research topic. QCNNs are an example of a quantum neural network that takes many design inspirations from classical CNNs, and they use parameterized quantum circuits to classify images [1]. In a previous study, researchers trained QCNN models to classify handwritten digits with using a system of 49 qubits, achieving an accuracy of 96% using quantum hardware [2]. Simulating this number of qubits on a classical machine requires large amounts of memory, as seen in another study that simulated a 61-qubit quantum circuit using 768 terabytes of memory [3], and it is almost impossible to scale to 128 qubits in the near future. When limited classical hardware is available, simulating QCNNs can serve only as educational examples with little practical value. For example, the QCNN example provided in the Qiskit machine learning tutorial uses an approach that encodes each pixel of the image being classified into a qubit [4], and only 8 qubits are used to encode 8 pixels (2\(\times\)​4 grid). However, if a QCNN is to ever be useful, it must be able to classify images larger than a 2\(\times\)​4 grid of pixels, such as the 28\(\times\)​28 handwritten digits in the MNIST dataset [5]. Encoding each pixel into a single qubit becomes an unfeasible strategy unless we drastically reduce the size of the image to be classified, which carries the risk of decreasing the accuracy of the model due to the loss of pixel information.

Previous studies involving both QCNNs and CNNs have employed parallelization schemes to partition larger problems into smaller subproblems [[6]][7]. In the QCNN study, it continuously splits the circuit into smaller sub-branches of circuits, reducing the dimensionality of the problem and running all circuits in parallel. Therefore, for a 128-qubit problem, it still needs to solve a 128-qubit quantum circuit at the beginning. In the study involving the classical CNN model, the architecture partitions the original image into smaller sub-images, with each partition training a "local" CNN. The outputs of these CNNs are then used as inputs for a dense neural network (DNN) which is trained to classify the original image. Taking inspiration from such studies, we attempt to alleviate these constraints by parallelizing the circuit across different processes in a High-Performance Computing (HPC) cluster. We use the same partitioning strategy as the CNN-DNN architecture [6], but we opt to combine our processes via a binary reduction tree after each convolutional block rather than training a DNN at the end. Towards this we introduce a novel architecture that allowed us to simulate 128 qubits on minimal classical hardware without degrading the overall performance of the model.

1.2 Paper Contents and Organization↩︎

In section II, we discuss the software libraries and physical hardware we used in this work. Then, we describe the MNIST dataset. We also briefly discuss the the basic architecture of a CNN and the components of the Qiskit tutorial that we are building upon. In section III, we discuss the implementation of our parallel structure. First, we describe how we partition the image to be classified to different processes. Then, we describe how these partitions manipulate the data and eventually interact with the other partitions. Next, we discuss the changes we implemented to how our parameters are defined to support this new structure. Finally, we touch on how we implemented the training loop use to fine-tune all of our new parameters. Section IV describes the results of our experiments using this structure, and Section V is a brief conclusion and speculates on future options for continuing our work.

2 Background and Setup↩︎

2.1 Tools and Software↩︎

All of the code produced was run on a High-Performance Computing (HPC) cluster. The cluster has a partition in which we are able to utilize nodes equipped with NVIDIA H100 96GB HBM3 GPUs, AMD EPYC 9454P CPUs, and up to 512GB of memory. In this paper, we only used the CPUs to demonstrate the power of the novel architecture in minimizing resource requirements. For our 64-qubit simulation, we split the work across 16 processes: 4 nodes, 4 processes per node. Similarly for our 128-qubit simulation, we split the work across 32 processes: 4 nodes, 8 processes per node. Each process is assigned 8 gigabytes of memory. We construct all of our circuits and simulate the quantum state evolution using Qiskit (version 1.4.4), and we use MPI4PY (version 4.1.1) for parallelization.

2.2 Dataset↩︎

The MNIST dataset is a widely used dataset used to train and evaluate image related machine learning tasks. It is composed of images of a single hand written digit that is displayed in a 28\(\times\)​28 pixel image. The digits in this dataset range from 0 to 9, all written with varying handwriting styles. In total the dataset has 60,000 training images and 10,000 test images. For the purposes of this study we have opted to only perform a binary classification task, classifying an image between one of two possible digits: 0 and 1. For this study, we use a small subset of this dataset with 125 samples total: 63 0s and 62 1s with a 80:20 train test split. Fig. 1 displays sample images of these digits in their original resolution.

2.3 Classical CNN Background↩︎

A CNN is a classical neural network that is primarily used to perform classification tasks on images [8]. They are primarily composed of two types of parameterized layers: convolutional and pooling. The convolution layer’s primary function is to perform feature extraction by applying a sliding kernel across a smaller portion of the original image. These kernels produce feature maps, which represent where in the image certain features were found. The pooling layer reduces the dimensionality of these feature maps, condensing the information into a smaller feature space. These layers are implemented together in an alternating manner to reduce the original image into a vector that the algorithm will predict on. These parameterized layers are fed through an optimization loop, allowing the model to adjust its parameters and eventually learn relevant information pertaining to its classification task.

2.4 QCNN Background↩︎

The QCNN architecture draws inspiration from its classical counterparts but implements these ideas using quantum circuits [4]. The one upon which our novel architecture is built is based on a Qiskit tutorial. These circuits are parameterized 2-qubit unitaries that emulate the behavior of their classical counterparts by learning the relationship between paired qubits through shared information. The inputs of these circuits are individual pixels from the image to be classified that have been encoded into a quantum state via Qiskit’s Z-feature map [4].

The Z-feature map is a 1-qubit quantum circuit found within Qiskit’s circuit library that encodes a real number, denoted as \(x\), into a quantum state (Fig. 2). The 2D array of pixels is flattened into a single dimension, and each pixel is assigned to a qubit which has been initialized to \(\ket{0}\). The Z-feature maps apply the Hadamard gate to each qubit, and then use a phase gate, denoted as \(\boldsymbol{P(x)}\) in Fig. 2, to rotate the state proportional to the pixel value, \(x\), so as to encode the pixel value into a quantum state, which will be fed into the following convolution layer.

The convolutional circuit, pictured in Fig. 3, is modeled after the most general form of a 2-qubit unitary [9]: \[N(\alpha,\beta,\gamma) = exp(i[\alpha \sigma_x\sigma_x + \beta\sigma_y\sigma_y + \gamma\sigma_z\sigma_z])\] Each convolutional circuit has 3 trainable parameters, denoted by \(\theta\) in Fig. 3, which are adjusted by a classical optimizer during the training loop. These parameterized gates are distributed across a 3-CNOT structure, which serves as a SWAP gate if there were no rotation gates in between. The presence of these parameterized gates controls how much information is actually mixed between the paired qubits.

Similarly, a pooling circuit, pictured in Fig. 4, is also a 2-qubit unitary that has 3 trainable parameters. These parameters, also denoted as \(\theta\) (but are different parameters than those in the convolution layers), are also adjusted during the training loop. The main distinction between the two circuits is that the pooling circuit does not include the third controlled-NOT gate after the third parameterized gate execution. By doing this, the circuit is pooling the information from the “source qubit”, denoted by \(q_2\) in the figure, into the “sink qubit”, which is denoted as \(q_3\), such that all the relevant information resides in the sink qubit [4]. This is because of the lack of entanglement symmetry after the parameterized gates are applied. Since the parameterized gates in the sink qubit do not influence the source, all of the relevant information that the model identifies is condensed in the sink. After all of the information is condensed, the source can be ignored for the remainder of the circuit.

Both of the aforementioned circuits are used as building blocks to create imitations of classical convolutional and pooling layers. Fig. 5 shows a 4-qubit QCNN after Z-FeatureMap. To form the convolutional layers similar to the classical CNN counterparts, the convolutional circuits are applied on neighboring qubits such that each qubit is paired with the qubit above and below it on the register. The Qiskit tutorial also pairs the first and last qubits together, but we do not in our architecture. Similarly, pooling layers are formed by pairing off the qubits into a register such that half of the qubits are designated as sources and the other half as sinks, as seen in Fig. 5c. If there is an odd number of qubits, two qubits act as the source for a single sink qubit, executing the circuit twice with different sources, but the same sink. Doing so means that after the execution of every pooling layer, the architecture cuts the number of relevant qubits in the system in half, rounding down if necessary. Applying these layers in an alternating manner, as seen in Fig. 5a, extracts features and reduces the system until only a single qubit remains. The Pauli Z expectation value of this last qubit is used in the model’s prediction. The possible measurement outcomes are -1 or 1. The expectation is thus a value ranging from -1 to 1, which is mapped to one of two labels in a binary classification problem. For example, a positive expectation value corresponds to digit 1, and other values correspond to digit 0.

3 Novel Architecture↩︎

Given a large number of pixels, the problem becomes being able to represent all the information within a qubit register. A large number of qubits is unrealistic to simulate with a single process, as the size of the matrices scales exponentially and becomes unmanageable for the physical memory of the machine. It is known that even with supercomputers, it is not feasible to simulate a system with more than 50 qubits without approximations. To remedy this problem, we have devised a novel parallel architecture that can be implemented in real hardware for QCNN and, at the same time, can be simulated with classical computers.

3.1 Partitioning↩︎

Before building the parallel circuit structure, our first step is to partition the original image into smaller independent sub-images. By dispersing the original \(N\)-qubit problem into \(M\) partitions, we can assign each partition \(N/M\) qubits (assume divisible). Each partition is then given a separate process to run on, each with its own allocated amount of memory, and treated as independent of the others. Without partitioning, the number of physical bytes, denoted as \(P_{bytes}\), needed to represent \(N\) qubits can be estimated as the following [10]: \[P_{bytes} = 2^{N+4}\] This is because each state vector in Qiskit is represented as an array of \(2^N\) complex numbers which use the complex128 data type, or 16-byte complex numbers [11]. However, using the partitioning scheme, our physical memory requirements become: \[P_{bytes} = (2^{(N/M)+4})M\] The impact of partitioning on physical memory requirements can be seen in Fig. 6. We can see that partitioning qubits into 2 processes drastically impacts the amount of memory required.

To partition our image into smaller sub-images, we first use a classical average pooling downsizing method to resize the original image to have the same number of pixels as there are total qubits, \(N\). Fig. 7 displays downsized versions of the digits displayed in Fig. 1 in a 16-qubit, 64-qubit system, and 128-qubit system. The pixel dimensions of the downsized image preserve the dimensions of the original image as closely as possible. For example, in Fig. 7c, we downsize the image into an 8\(\times\)​16 image because 128 pixels cannot fit into a perfect square. These downsized images are then grouped into smaller chunks and distributed to different processes. For smaller systems, such as a 16-qubit configuration, we can group these pixels in different configurations: rows, columns, and quadrants. Figs. 8 and 9 display the possible ways to distribute the downsized images into sub-images, where each box represents a single pixel, and the number in the box is the pixel’s index. We try different grouping methods to see if the spatial context that each grouping method provides has an impact on the resulting accuracy of the model. In the case of a 64-qubit system, we use a configuration of 16 4-qubit processes with each process handling a 2\(\times\)​2 pixel chunk. In the case of a 128-qubit system, we use a similar configuration of 32 4-qubit processes, with each process handling a 2\(\times\)​2 pixel chunk. After each process is assigned a subset of pixels from the downsized image, each group of pixel values is flattened and we encode these values into the qubits with a Z-feature map.

3.2 Reduction and Combination Architecture↩︎

The circuit that can be run on a real quantum computer is shown in Fig. 10. It shows an example of partitioning a 12-qubit problem into two groups of 6-qubit problems. After partitioning and encoding the qubits, we apply a distributed QCNN architecture to train the model. First, each independent system applies a single convolutional and pooling layer to the their qubits. Similar to previous implementations and classical counterparts, these layers condense the relevant information into half of the partition’s original amount of qubits. After each combination stage, half of the qubits are not used (equivalent to applying identity gates). However, to simulate this circuit, the resources will grow exponentially with the number of qubits.

3.3 Simulation Strategy↩︎

Since we no longer care about the source qubits in each of the partitions, we can represent each partition in a reduced state by taking the partial trace over the source qubits in simulations. This is achieved by converting the state vectors into density matrices and then tracing out the source qubits, which we designate as the even-numbered qubits in our architecture, leaving us with only the density matrix of the sink qubits [12]. \[\rho_{sink} = Tr_{source}(\rho_{total})\] Then, neighboring processes are paired with each other by process order. One of the paired processes receives its partner’s density matrix while the other sends it, as seen in the inter-process communication step in Fig. 12. The new density matrix for a new state is then created via the result of a tensor product of both processes’ reduced density matrices as denoted below. \[\rho_{combined} = \rho_{send} \otimes \rho_{recieve}\] This is possible because both states, prior to combination, were completely independent from each other. A process that shared its density matrix with its partner is then stopped, as all of its information is contained in the new state carried by its partner. It should be noted that, after the first combination, we are simulating the density matrix, , instead of state vectors, \(\ket{v}\). Therefore, the evolution of the density matrix is used. Instead of calculating \(\boldsymbol{U}\ket{v}\), \(\boldsymbol{U}\boldsymbol{\rho}\boldsymbol{U}^\dagger\) is calculated with the evolve() function in Qiskit. The resulting remaining states are still \(N/M\) qubits in size, however the number of total processes is halved. We then apply a convolutional and pooling layer to reduce the system to prepare it for the next reduction, repeating these steps, or final classification steps.

This reduction pattern, which is displayed in Fig. 11 for a model being trained with 4 processes, is repeated until there is only a single process remaining, mimicking a binary reduction tree structure. This introduces the constraint that the number of defined processes must be a power of 2. Then, exactly like our initial model, we apply alternating convolutional and pooling layers on the remaining state until a single qubit remains for measurement and classification. This process emulates the dimensionality reduction seen in classical CNNs.

Therefore, for the 12-qubit example in Fig. 10, the simulation structure is depicted in Fig. 12 and 13 with details.

3.4 Parameterization↩︎

The parallelized nature of the new architecture changes the way parameters are used within the system. Our structure contains three distinct groups of parameters: local, reduction, and final. Here, local refers to the first stage of the QCNN. Final refers to the last stage of the QCNN. Reduction refers to all stages in between where dimensionality is reduced. In our parallel structure, every independent process has an identical set of local parameters. By applying the same local parameters on each partition of the original image, we are effectively emulating the behavior of a classical CNN which applies the same sliding kernel across the image to extract features. These parameters can be seen in the local convolutional layer in Fig. 12. Reduction parameters, seen in the tree reduction section in Fig. 13, are used as the convolutional and pooling circuit parameters after a combination step has occurred. These parameters are distinct across each tree reduction layer, because their goal is to extract information between combinations of states at various levels of combination. The final parameters, seen in the final reduction portion of Fig. 13, are all of the parameters that remain after the final combination and reduction steps are completed. These parameters are only used by the last process in our system. All of these parameters are randomly initialized in a uniform distribution centered around 0 and range between -0.1 and 0.1.

Due to the aforementioned parameter definitions of the quantum circuit, the total number of parameters is dependent on both the number of qubits in each process and the number of processes we have defined. Each individual convolutional and pooling circuit has 3 parameters. A convolutional layer creates \(n-1\) pairs of qubits, where \(n\) is the number of qubits in the layer. When it is divisible, \(n=N/M\). The number of parameters of each \(n\)-qubit convolutional layer is \(3(n-1)\). A pooling layer creates \(n/2\) pairs, meaning that the number of respective parameters is \(3(n/2)\). This means that the number of parameters, denoted as \(P\), in a convolutional block, or the combination of a convolutional and pooling layer, of \(n\) qubits can be estimated as the following. \[P(n) = 3(n - 1) + 3(n/2) = (9n/2)-3\] Therefore, the number local parameters, for a process with \(n\) qubits can be written as \[P_{local} = P(n)\] Because the local parameters are shared across all processes and the final parameters are only used on the final process remaining, the only impact the number of processes has on the number of parameters is how many sets of reduction parameters are stored, i.e., \(log_2(M)\). The reduction circuit is architecturally the same as the local circuit, so the total number of reduction parameters, given \(M\) number of processes, can be written as the following. \[P_{reduction} = log_2(M)P(n)\] The number of final parameters is just the summation of parameters for each convolutional block needed to reduce the last process down to a single qubit. Since the reduction layer returns a state with \(n/2\) qubits, we can express this as a summation of number of parameters in convolutional blocks, P, for every power of 2 until \(n/2\):

\[P_{final} = \sum_{k=1}^{log_2(n)-1}P(2^k)\] In the special case of the number of qubits not being a power of two, such as the 3 remaining qubits in Fig. 13 we just need to consider that there is an extra pooling circuit execution to pool 3 qubits into a single one. The total number of parameters in a system \(M\) processes, each with \(N\) qubits can be is just the sum of all the types of parameters: \[P_{total} = P_{local} + P_{reduction}+P_{final}\] Table 1 shows how the number of parameters scales within our architecture.

10pt

3.5 Training Loop↩︎

The training loop we have implemented is a stochastic gradient descent. This is a classical parameter optimization algorithm that works by updating a model’s parameters based on a gradient calculated after a single pass of a sample [13]. The loss function we have chosen is a simple mean-square error, and we calculate our gradient by using the parameter shift rule [14]. The parameter shift rule allows us to calculate the derivative of our expectation value, or predicted value \(f(\theta)\), by performing the same circuit twice with the parameter shifted up and down: \[\frac{\partial f}{\partial \theta}= \frac{f(\theta + \pi/2)-f(\theta -\pi/2)}{2}\] However, this means that a forward pass must be conducted twice for a single parameter to be updated, which doubles the amount of training time. In order to update all of the parameters after a single sample, we would need to perform several forward passes to update all of them, which is extremely time consuming. To save time, we have opted to adjust 15 parameters per sample in the training set only. Therefore, 1500 parameters are adjusted per epoch if there are 100 training samples. To do so, we created a parameter index that contains all of the parameters initialized for the model. At the start of each epoch, we randomize the order of this index. The parameters updated per sample are chosen in this order, looping back around after all parameters have been updated.

3.6 Adjustments and Considerations↩︎

During the development and testing of this architecture, we found that it takes systems with larger qubit counts per process a significantly longer time to train a model, i.e. 4 16-qubit processes takes significantly longer than 16 4 qubit processes. This is likely due to the exponential growth of computational power needed to perform the matrix operations needed to simulate the states and density matrices as the system does its forward passes. This, compounded with the fact that several forward passes are made each sample makes up the drastic differences in runtime. This is why we have elected to only pursue 4-qubit processes, grouped in 2\(\times\)​2 pixel chunks, when attempting to simulate our larger configurations of 64 and 128 qubits in the following Section.

4 Results↩︎

To test the effectiveness of this new architecture, for the same problem, we trained several models and compared their accuracies. First, we trained 10 models using a single 12-qubit process and another 10 using a 16-qubit process. These models represent typical QCNNs without parallelization. Then, we trained 10 additional models for each possible grouping with our parallel architecture. We trained multiple models to average out the noise introduced by the order of parameter updates in the training loop and random parameter initialization. All of these models were trained using 100 samples over 100 epochs with a learning rate of 0.1. All models were tested with an additional 25 samples sourced from the train test split we discussed earlier. These low sample counts were used in the name of expediency, as we have not implemented any graphics card acceleration for this architecture, and because the models trained display sufficient accuracies. While other studies have found 50 epochs to be sufficient to train an effective model, we elected to train over 100 epochs to allow our models more time to converge [15]. The averages for each configuration can be seen in Fig. 14.

Comparing the average accuracies of configurations with the same number of qubits, we can see that the parallel architecture performs competitively. Models trained with 2 6-qubit processes perform as well as models trained with a single 12-qubit process. In other cases, we see some mixed results. Models trained with 2 8-qubit configurations and models trained with 4 4-qubit models grouped into columns seem actually outperform a their single 16-qubit counterpart in both training and test accuracy. However, models trained with 4 4-qubit processes grouped into rows or quadrants seem to perform worse than their single process counterpart. This implies that the way these partitions are grouped impacts the overall accuracy of the model.

Next, we used same approach to train much larger systems, but partitioned into 4-qubit processes due to time constraints. We trained 10 models using 16 4-qubit processes, which is a total system of 64 qubits, and another model using 32 4-qubit processes, totaling to 128 qubits. The original image for the 128-qubit case is downsized to 8\(\times\)​16 pixels. The average accuracies of these larger models are compared to the best performing smaller models: a single 12-qubit process, 4 4-qubit processes grouped into columns, and 2 8-qubit processes grouped into columns. This comparison can be seen in Fig. 15.

Here, we can clearly see that the models trained with a large number of qubits performs similarly to the best performing configurations trained on smaller systems. Despite being grouped by 2\(\times\)​2 pixel squares, which is one of the worse grouping configurations seen in Fig. 14, larger models are able to achieve competitive training and testing accuracies when compared to their smaller counterparts. This may signify that adding more qubits to the system, and therefore more pixels to the downsized image, does increase the overall accuracy of the model.

5 Conclusion↩︎

This study has shown that it is possible to parallelize simulated QCNNs support several times more qubits than what is possible in a single process given the same amount of total memory. By using the novel architecture that we have introduced, we have shown that we can train competitive QCNN models using both 64-qubit and 128-qubit systems using classical computers. When pixels are grouped in certain configurations, this parallel approach produces models with higher the accuracy scores when compared to accuracies of models trained on a single process with the same number of total qubits. These results suggest that further testing, exploration and refinement of this architecture is well justified.

6 Acknowledgment↩︎

This work was supported in part by the National Science Foundation under Grants 2125906 and 2430291.

References↩︎